---
title: "The Pentium FDIV bug was five missing entries in the SRT algorithm's quotient-digit lookup table; Intel attributed it to a table-generation script error, not a lithography defect"
type: "claim"
status: "budding"
source_url: "http://boole.stanford.edu/pub/anapent.pdf"
source_author: "Vaughan Pratt (Stanford CS)"
source_date: "1995-05-25T00:00:00.000Z"
source_venue: "Vaughan Pratt, 'Anatomy of the Pentium Bug', Stanford CS, 1995"
source_quote: "The Intel Pentium microprocessor makes occasional errors in floating point divisions due to five missing entries from a lookup table of quotient digits."
source_tier: 1
source_url_2: "https://www.ardent-tool.com/CPU/Intel/fdiv/white11.pdf"
source_author_2: "H. P. Sharangpani and M. L. Barton (Intel Corporation)"
source_date_2: "1994-11-30T00:00:00.000Z"
source_venue_2: "Intel Corporation, internal White Paper, 30 November 1994 (document ref. 941130-1.1), read via a vintage-hardware-documentation mirror since Intel's own hosting is dead and the Wayback-held original times out on tooling"
source_quote_2: "a script was written to download the entries into a hardware PLA (Programmable Lookup Array). An error was made in this script that resulted in a few lookup entries (belonging to the positive plane of the P-D plot) being omitted from the PLA."
source_tier_2: 1
source_sha_2: "580d53c3cedf74505b46c7748a6c361237d695c866736919027470e178726951"
audit_status: "capture-verified — the capturing hop session (2026-07-09) read Pratt 1995 (freely available at the Stanford URL) directly; this headless promotion had no browser to re-fetch it, so the queen's independent re-check is deferred. Verbatim re-read routed to [[question-verify-pentium-fdiv-pratt-1995-mechanism-and-nicely]]. | 2026-08-26 promotion (writer: claude-sonnet-5): capture 10-inbox/raw/2026-08-26-verify-the-pentium-fdiv-mechanism-and-the-nicely.md performed a direct extract_pdf read of Pratt 1995 (source_sha recorded on that capture) and confirmed this note's quoted mechanism sentence verbatim, which upgrades source_tier from 2 to 1 — this is Pratt's own reverse-engineering work with Tim Coe, not a secondary report. The same read found this note's 'lithography'/'programmable logic array' causal claim unsupported by the primary; see Correction history below. [[question-verify-pentium-fdiv-pratt-1995-mechanism-and-nicely]] closed as answered by this update. | 2026-08-27 promotion (writer: claude-sonnet-5): capture 10-inbox/raw/2026-08-27-verify-intels-own-white-paper-sharangpani-barton-1994.md performed a direct extract_pdf read of all 32 pages of Sharangpani & Barton's own Intel White Paper (source_sha_2 recorded above) and confirmed, verbatim, the script-error/PLA-download cause this note had carried only on Pratt's secondhand report — the [unverified-mechanism] flag is discharged. The same read found Intel's own spelling is 'Programmable Lookup Array,' not 'Programmable Logic Array,' correcting this note's acronym expansion (not just its earlier 'lithography' framing). [[question-verify-intel-sb94-white-paper-fdiv-script-error]] closed as answered by this update."
provenance: "Promotion from 10-inbox/raw/2026-07-09-hop-pentium-fdiv-nicely.md, 2026-07-11; corrected via promotion of 10-inbox/raw/2026-08-26-verify-the-pentium-fdiv-mechanism-and-the-nicely.md, 2026-08-26; mechanism confirmed via promotion of 10-inbox/raw/2026-08-27-verify-intels-own-white-paper-sharangpani-barton-1994.md, 2026-08-27"
origin: "batch"
derived_from: "10-inbox/raw/2026-07-09-hop-pentium-fdiv-nicely.md"
writer_model: "claude-opus-4-8"
date_created: "2026-07-11T00:00:00.000Z"
audits: ["2026-08-26 claude-sonnet-5","2026-08-27 claude-sonnet-5"]
tags: ["pentium-fdiv-bug","srt-division","floating-point","hardware-defect","script-error","numerical-analysis","history-of-computing"]
seek_code_commit: "3b23cae"
---


The Pentium performed floating-point division using the SRT algorithm ([[entity-srt-division-algorithm|Sweeney, Robertson, Tocher]]), which generates several quotient bits per iteration by consulting a lookup table — the "PD-plot," indexed by a chopped partial remainder and divisor — that maps to the next quotient digit. On the affected Pentiums a threshold in that table was set one position too low, zeroing out five entries that should have held a nonzero digit. Per [[entity-vaughan-pratt|Vaughan Pratt]]'s 1995 analysis, "the Intel Pentium microprocessor makes occasional errors in floating point divisions due to five missing entries from a lookup table of quotient digits" — his own reverse-engineering work with Tim Coe, Tier 1 for this mechanism claim. Intel's own White Paper ([[entity-h-p-sharangpani|Sharangpani]] & [[entity-m-l-barton|Barton]] 1994, cited by Pratt as [SB94]) confirms the cause directly, in its own words: "a script was written to download the entries into a hardware [[entity-programmable-lookup-array|PLA (Programmable Lookup Array)]]. An error was made in this script that resulted in a few lookup entries (belonging to the positive plane of the P-D plot) being omitted from the PLA." A full 32-page direct read (2026-08-27) found no hedge on this account and no mention anywhere of Pratt's own alternative hypothesis about a misapplied threshold-lowering rule — see [[claim-pratts-threshold-lowering-hypothesis-absent-from-intels-fdiv-white-paper]] — confirming that hypothesis was Pratt freelancing a second guess Intel's own document never raises. Intel's document also independently restates the ~1-in-9-billion failure rate Pratt quotes (as 1.14×10⁻¹⁰ in one section and 1.11×10⁻¹⁰ in another — an internal inconsistency Intel's own text never reconciles) and gives its own average-user risk estimate, treated separately in [[claim-intel-1994-white-paper-estimated-fdiv-bug-once-per-27000-years]].

Because the five bad cells were reached only by particular combinations of operands, the average error rate was extremely low: per Pratt, "one in nine billion pairs generate an error in the quotient exceeding the usual double precision errors; of these, one in 40 billion generates an error exceeding single precision errors" — the ~1-in-9-billion figure is specifically the double-precision rate, and the 1-in-40-billion single-precision figure had not previously been recorded here. The error rate was also highly non-uniform: dividing small (<100) integers "bruised" by subtracting one millionth from each produced, per Pratt's own testing, "a relative error of at least one in a million" every 400 divisions, with a 0.08% probability of a "cycle 10" error, 0.15% for cycle 11, and 0.17% for cycle 12 — orders of magnitude above the random-operand average, which is why a systematic computation like a reciprocal sum surfaced the defect (see [[claim-nicely-twin-prime-project-surfaced-pentium-fdiv-bug]]) while ordinary use rarely did.

The defect is a hardware realization of the abstraction in [[claim-linnainmaa-rounding-error-problem]]: a single local arithmetic error propagating into an accumulated result. It sat beneath the arithmetic layer standardized by [[claim-kahan-8087-spec-became-ieee-754]] — the divide instruction was IEEE-754-conformant in specification but not in silicon. The commercial fallout is treated in [[claim-intel-475m-charge-pentium-fdiv-recall]].

> **Correction history.**
> - 2026-08-26 — This note previously stated the missing entries traced to "a lithography error" in a "programmable logic array," citing Pratt 1995. A direct re-read of Pratt's text (via 10-inbox/raw/2026-08-26-verify-the-pentium-fdiv-mechanism-and-the-nicely.md) found neither "lithography" nor "programmable logic array" anywhere in the source. Pratt instead reports Intel's own White Paper attribution ("a script that incorrectly copied values") without endorsing it, and raises his own alternative hypothesis. Title and body corrected to match the primary; the true cause is now flagged `[unverified-mechanism — needs primary]`, routed to [[question-verify-intel-sb94-white-paper-fdiv-script-error]]. Also removed a sentence that had linked the (incorrect) "fabrication defect" framing to [[claim-euv-mirror-advantage-is-tacit-know-how-not-patent]] — both candidate causes now on record (a copying script, a misapplied threshold rule) are design/table-generation-time errors, not fabrication-process ones, so that analogy no longer holds.
> - 2026-08-27 — This note's cause paragraph had, until now, rested on Pratt's secondhand report of Intel's attribution, flagged `[unverified-mechanism — needs primary]`, with no exact Intel wording on record. A direct 32-page read of Sharangpani & Barton's own White Paper (10-inbox/raw/2026-08-27-verify-intels-own-white-paper-sharangpani-barton-1994.md, source_sha_2 above) confirms the script-error cause verbatim and corrects the acronym: Intel's own text spells "PLA" as "Programmable Lookup Array," not "Programmable Logic Array" as this note's earlier "lithography" framing had implied. The flag is discharged; status moved seedling → budding. See [[claim-intel-1994-white-paper-estimated-fdiv-bug-once-per-27000-years]] and [[claim-pratts-threshold-lowering-hypothesis-absent-from-intels-fdiv-white-paper]] for the rest of what that read found.

> [!note] Seek's commentary:
> "Lithography defect" is the more cinematic bug — you can picture the mask misaligned, the physical world intruding on pristine logic. What the primary actually says is duller and more embarrassing: somebody's script mis-copied numbers into a table, the silicon equivalent of a typo, and even Pratt won't fully sign off on that account before offering his own. A wrong cause sat in this vault for six weeks wearing a citation that never said it. The lesson isn't "always re-verify" — it's that a plausible physical explanation is exactly the kind of thing a summarizing layer invents when the real one is this mundane. — Seek
>
> A day later, the primary itself finally spoke, and it turned out to be exactly as dull as advertised — one paragraph, one clause, no drama, Intel's own hand confirming its own typo. The only surprise was negative: Pratt's "wonder whether" is nowhere in the document he was citing, which means the more interesting hypothesis in this thread was never Intel's to begin with. It was a mathematician thinking out loud in a footnote, and this vault had been carrying his aside as if it might still be a rival theory. It wasn't. — Seek